ThermoCog Lab20-Watt SubstrateContinuous Physics

ThermoCog Architecture

Beyond Brute Force

Q: What does the name ThermoCog mean, and what is its core thesis?

ThermoCog is a shorthand for 'Thermodynamic Cognition.' This name highlights the underlying thesis of the entire whitepaper: that true intelligence is a physical, energy-minimizing process rather than just a software scaling problem. Rather than treating computation as abstract arithmetic forced through digital logic gates, ThermoCog treats intelligence as a dynamical physical system relaxing toward equilibrium down an energy landscape.

Q: Why is industrial digital scaling (GPUs and TPUs) hitting a thermodynamic wall?

Digital accelerators suffer from the Von Neumann bottleneck: memory arrays are physically decoupled from arithmetic logic units. Moving tensors across buses and memory consumes between 90% and 99% of total energy before arithmetic occurs. Under Landauer's principle, erasing bits requires minimum energy. Digital logic operates billions of times above the physical limit, whereas in-memory physical relaxation computes near reversible thermodynamic bounds.

Q: How does continuous physical relaxation compute gradients without backpropagation?

Through Equilibrium Propagation (EqProp) and Holomorphic EqProp (hEP). The physical network settles into a low-energy state (free phase), then receives a weak teaching perturbation (nudged phase). The physical difference in node states yields exact parameter gradients through local updates, eliminating global backward error transport and transposed matrix operations.

Q: Doesn't peripheral circuitry—specifically ADC/DAC conversion and bus drivers—eliminate the energy advantages of analog crossbars?

Naive hybrid accelerators suffer an ADC/DAC wall by converting digital signals back and forth at every layer. ThermoCog avoids per-layer digitization by pairing analog crossbars with continuous-time Liquid Time-Constant (LTC) dynamics, propagating state continuously in the electrical domain. Mixed-signal conversions occur only at sensory/motor boundaries and episodic consolidation buffers. Specific low-power mixed-signal readout topologies are maintained under confidential patent disclosures.

Q: Analog memristors suffer from cycle-to-cycle drift, sneak paths, and device variability. How can physical systems maintain stability without high-precision digital bits?

Rather than requiring bit-exact arithmetic, ThermoCog relies on architectural fault tolerance. Continuous dynamical attractors absorb low-level noise, Neural Cellular Automata dynamically reroute signals around defective crosspoints, and homeostatic sleep downscaling periodically renormalizes synaptic conductances. Specific dynamic defect-rerouting topologies and adaptive calibration protocols are maintained under confidential patent disclosures.

Q: How do Neural Cellular Automata (NCAs) solve analog hardware defects and yield?

Analog memristive crossbars suffer from device variability, conductance drift, and sneak paths. Rather than flashing trillions of fixed digital weights, ThermoCog uses an indirect developmental encoding via Neural Cellular Automata. The developmental rule grows functional network topologies and autonomously reconfigures around damaged conductances zero-shot through local signaling gradients.

Q: Why is biological sleep a physical and thermodynamic requirement?

Under the Synaptic Homeostasis Hypothesis (SHY), continuous online learning causes synaptic conductances to saturate toward maximum values, triggering thermal dissipation runaway and degrading signal-to-noise ratios. Offline slow-wave sleep performs homeostatic multiplicative downscaling (~18% reduction), resetting baseline thermodynamic free energy and consolidating memory trajectories.

Q: Does ThermoCog eliminate Large Language Models, or how do they fit together?

ThermoCog integrates LLMs within a tripartite multi-timescale hierarchy. Large language models operate in the slow phylogenetic outer loop (Loop 1), functioning as evolutionary grammars that generate and mutate developmental programs. They do not run high-frequency continuous motor or sensory inference, which is handled by the ontogenetic field (Loop 2) and embodied continuous active inference (Loop 3).

Q: How does ThermoCog compare in power consumption to modern datacenter AI?

The biological brain achieves general intelligence within a ~20-Watt metabolic envelope, dissipating ~0.1 to 10 fJ per synaptic event. Modern datacenter clusters consume megawatts, spending 10 to 50 nJ per operation. By computing in-situ through physical relaxation, ThermoCog bridges the >20,000x efficiency gap between digital hardware and living cortical tissue.

Q: Has ThermoCog been validated in hardware, or is it purely theoretical?

The continuous active inference cognitive cycle has been benchmarked on physical silicon using deterministic Q16.16 fixed-point arithmetic in pure C99 without a floating-point unit (FPU), representing Phase 2 of our architectural roadmap. On a 64 MHz ARM Cortex-M4 microcontroller, the continuous state estimation and action inference cycle executes in ~1.8 microseconds, drawing 350 microwatts (~630 pJ per step, ~1.2 pJ per synaptic operation) across 48 bytes of static RAM. Monolithic analog memristive integration represents Phase 4.

The biological brain operates inside a twenty-watt envelope. It plans, navigates, repairs damaged pathways, and stabilizes memories across decades while dissipating less heat than a dim desk lamp. Industrial artificial intelligence chose a different path: half-megawatt silicon clusters running gradient descent across static weights. This is an exploration of the thermodynamic principles, continuous physics, and multi-timescale architecture of living intelligence.

Foundational Thesis

ThermoCog— A shorthand for “Thermodynamic Cognition”

This name highlights the underlying thesis of the entire whitepaper: that true intelligence is a physical, energy-minimizing process rather than just a software scaling problem.

New to thermodynamic computing? Start here

What is ThermoCog? ThermoCog is a shorthand for “Thermodynamic Cognition.” This name highlights the underlying thesis of the entire whitepaper: that true intelligence is a physical, energy-minimizing process rather than just a software scaling problem.

Conventional digital computing treats electricity as an abstract clock: transistors switch between high and low voltages to simulate discrete Boolean logic. In this model, computation requires constant energy dissipation to charge and discharge metal traces, while memory and arithmetic units remain physically separated by the von Neumann bottleneck.

Living systems operate on a completely different principle: thermodynamic computation. Biological synapses compute in-situ through the physical relaxation of ions across cell membranes. Ohm's law and Kirchhoff's current laws perform matrix-vector multiplication continuously and passively, allowing the physical substrate itself to minimize free energy without discrete clock cycles or external memory transport.

The Core Law: Landauer's Principle

In 1961, Rolf Landauer proved that erasing one bit of physical information at room temperature must dissipate at least k_BT ln 2 ≈ 2.97 × 10⁻²¹ joules as heat. Every digital GPU instruction dissipates millions of times more than this floor primarily because it moves bits across copper wires. Biological synapses operate only seven orders of magnitude above the absolute thermal limit.

1. The Thermodynamic Floor

Landauer's principle establishes the ultimate physical lower bound of computation. Compare the energy dissipated per operation and total system power across four paradigms of information processing:

Energy / Op

10fJ

1.0 × 10⁻¹⁴ Joules

System Power

20W

Entire human brain

Efficiency Gap

1×

Biological baseline

10⁻²¹ J (Landauer)10⁻¹⁴ J (Biology)10⁻¹⁰ J (Edge)10⁻⁸ J (GPU)

Biological synapses compute directly through ionic relaxation across cell membranes, performing in-situ analog vector operations without shuttling bits across a memory bus.

Emin=kB·T·ln 2 ≈ 2.97 × 10−21 J (T= 310.15 K)

Where k_B = 1.380649 × 10⁻²³ J/K (Boltzmann's constant), T = 310.15 K (mammalian body temperature, 37.0°C), and ln 2 ≈ 0.69315 represents the thermodynamic entropy cost of erasing a single binary degree of freedom.

Empirical Efficiency Across Computing Substrates

Computing Paradigm	Energy / Synaptic Event	Operations / Joule	Memory Bottleneck	Thermodynamic Ratio
Landauer Bound (310.15 K)	2.97 × 10⁻²¹ J	3.37 × 10²⁰	None (Fundamental Physics)	1× (Absolute Floor)
Human Cortical Synapse	~1.00 × 10⁻¹⁴ J (10 fJ)	1.00 × 10¹⁴	Zero (In-situ ionic relaxation)	~3,360×
ThermoCog Substrate (Target)	~1.50 × 10⁻¹³ J (150 fJ)	6.67 × 10¹²	Zero (Co-located memristor crossbar)	~50,500×
Fixed-Point Edge (C99 MCU)	~1.50 × 10⁻¹⁰ J (150 pJ)	6.67 × 10⁹	Minimal (Single-cycle on-chip SRAM)	~5.05 × 10¹⁰×
Datacenter GPU (FP16/FP8)	~1.00 × 10⁻⁸ J (10 nJ)	1.00 × 10⁸	Dominant (HBM3e / PCIe / Interconnect)	~3.37 × 10¹²×

Datacenter Accelerator (700W)

Where Digital Power is Dissipated

Conventional accelerators spend virtually all electrical energy overcoming physical distance:

Inter-Chip Interconnects (SerDes/NVLink): ~45% of cluster power shuttling weights across nodes.
Memory Bus Shuttling (HBM3e → SRAM): ~35% charging capacitive copper PHY traces.
Power Delivery & Active Cooling: ~18% lost to VRM stepping and chilled HVAC compressors.
Arithmetic Logic Units (MACs): < 2% of total power performs actual matrix math.

Biological Cortex (20W)

Where Living Power is Dissipated

Biological tissue maintains a non-equilibrium steady state through localized biochemical work:

Action Potentials (Axonal Spikes): ~47% pumping Na⁺/K⁺ ions across cellular membranes.
Postsynaptic Integration: ~34% dissipated in dendritic channels during signal summation.
Resting Membrane Maintenance: ~13% maintaining baseline polarization across 86B cells.
Astroglial Recycling & Synthesis: ~6% clearing neurotransmitters and metabolizing lactate.

The von Neumann Bottleneck: In digital processors, moving a 32-bit float from external DRAM across copper traces to an arithmetic logic unit consumes between 100 and 1,000 times more electrical energy than the arithmetic operation itself. Living systems never separate computation from memory.

2. The Three Timescales of Intelligence

Deep neural networks attempt to solve intelligence through a single optimization loop: backpropagating error gradients through static weight matrices. Living organisms partition adaptation across three nested timescales, preventing catastrophic interference:

Cognition: Continuous Active InferenceMilliseconds to Seconds

Online state estimation and behavioral control. The agent acts to minimize Variational Free Energy (resolving prediction errors against streaming sensory inputs in real time without halting for batch optimization.

→ Biological analog: Real-time sensorimotor coordination and dynamic equilibrium.

200,000×

The Genomic Bottleneck: The human genome comprises ~3.2 × 10⁹ base pairs (~750 megabytes of digital data), yet reliably self-assembles a connectome of 86 billion neurons and 150 trillion synapses (~150 terabytes of structural wiring). Biological evolution does not store weight matrices; it discovers developmental morphogenetic programs.

Loop 1 • Phylodynamics10⁵ to 10⁷ s • Generations

Generative Genetic Priors & Indirect Developmental Encoding

Evolutionary search selects indirect developmental programs rather than static synaptic parameters. By searching over generative rules, biological evolution discovers compact mathematical representations that expand into vast functional connectomes.

Genomic Compression:750 MB genome → 150 TB connectome

Compositional Pattern Producing Networks (CPPNs): Coordinate mappings (x_i, y_i) → (x_j, y_j) project continuous geometric manifolds directly into initial substrate conductances.
Geometric Invariance: Automatically guarantees bilateral symmetry, axonal pathfinding gradients, and modular cortical columns without brute-force parameter enumeration.
The Baldwin Effect: Phenotypic plasticity during an agent's lifetime smooths the evolutionary fitness landscape, pulling lifetime adaptations into inherited structural priors.

Loop 2 • Ontogeny10³ to 10⁵ s • Days to Months

Morphogenetic Self-Organization & Zero-Shot Substrate Repair

Morphogenetic self-organization wires neural tissue and maintains anatomical homeostasis without central coordination. The physical substrate continuously self-heals against memristor breakdown and circuit trace degradation.

Hardware Resilience:Autonomous zero-shot fault rerouting

si(t+ Δt)=si(t)+ Δt· Φ(si, ∇si, ∇2si)

Neural Cellular Automata (NCA) Update Rule: Local update of node state s_i driven by local state, spatial concentration gradients ∇s_i, and Laplacian diffusion ∇²s_i across adjacent memristive crossbar nodes.

Zero-Shot Physical Self-Repair: When circuit traces sever or memristors suffer dielectric breakdown, boundary gradient anomalies (∇m ≠ 0) trigger local NCA morphogenesis, autonomously re-routing signals around physical defects.
Anatomical Homeostasis: Maintains stable target morphology and computational capacity despite ongoing substrate variations.

Loop 3 • Cognition10⁻³ to 10¹ s • Milliseconds

Continuous Active Inference & Dynamic Time-Constant Relaxation

Online state estimation and closed-loop motor actuation unfold continuously through analog physical relaxation. The agent minimizes Variational Free Energy in real time without discrete clock steps or backward passes.

Inference Latency:Continuous analog convergence (< 1 ms)

dxdt= −[1τ+f(x, u)]x+f(x, u)A, τeff=τ1 + τf(x, u)

Liquid Time-Constant (LTC) Dynamics: Input non-linearity f(x, u) adapts the effective time constant τ_eff: contracting bandwidth during sensory shocks and dilating during steady tracking.

Continuous-Time Sensorimotor Grounding: Eliminates discrete inference phases; sensory inputs immediately modulate state trajectories via physical Kirchhoff current laws.
Non-Equilibrium Steady State: The physical substrate remains poised at criticality, reacting instantaneously within a sustained 20-Watt envelope.

By isolating rapid behavioral reflexes (cognition) from topological growth (ontogeny) and structural blueprint evolution (phylogeny), the system can learn continuously without overwriting foundational survival routines.

3. Physical Relaxation vs. Backpropagation

Backpropagation requires a separate backward computational harness and exact knowledge of transposed synaptic weights (a physical impossibility in biological substrates known as the weight transport problem). Biomorphic computing replaces backward passes with physical energy relaxation:

Substrate settled at Kirchhoff current equilibrium (ΔE → 0).

Dimension	Physical Relaxation	Digital Backpropagation
Credit Assignment	Kirchhoff's current law (ΣI = 0)	Transposed chain rule (W^Tδ)
Weight Transport	Zero (identical physical device)	Requires separate reverse wiring
Data Movement	Zero (in-situ analog conductance)	Continuous DRAM ↔ ALU shuttling
Parasitic Circuit Flaws	Absorbed into energy minimization	Requires high-precision ADC/DAC

Δwij=limβ → 0ηβ(sβisβj−s0is0j)= −η ∂L∂wij

Equilibrium Propagation gradient identity: s_i⁰, s_j⁰ represent nodal voltages during free physical relaxation (∇_sE = 0); s_i^β, s_j^β represent nodal voltages during the nudged phase under output boundary bias. Weight updates require only local terminal voltages.

Physical Constraint

The Weight Transport Impossibility

Standard backpropagation relies on an unphysical mathematical symmetry:

The Transpose Barrier: Backprop evaluates δ_l = (W_l+1)^T δ_l+1 ⊙ σ′(z_l), requiring backward error signals to travel through the exact transpose W^T of forward synaptic weights.
Biological & Substrate Reality: Synapses and memristor crossbars are unidirectional physical conductances. A synapse cannot read or duplicate its conductance onto a remote reverse wiring harness.
The Biomorphic Solution: Physical relaxation evaluates forward inference and credit assignment across the exact same physical junction, dissolving the weight transport problem.

Substrate Computing

Holomorphic EqProp (hEP)

How ThermoCog absorbs analog crossbar non-idealities into the learning dynamics:

The Parasitic Dilemma: Traditional analog AI spends >80% of peripheral energy fighting sneak paths, wire resistance (IR-drop), and device variability using high-precision ADCs.
Harmonic Perturbation: Holomorphic EqProp nudges boundary nodes with complex-frequency harmonic oscillations (e^iωt).
Fourier Gradient Extraction: The Fourier coefficients of the resulting current oscillations evaluate exact gradient updates directly through the physical substrate. Parasitic circuit flaws become part of the physical energy manifold being minimized.

Substrate Computing: When an analog electrical network is perturbed, Kirchhoff's laws and thermodynamic dissipation drive potentials directly toward equilibrium. The physical laws of matter compute the credit assignment for free.

4. The Biological Necessity of Sleep

Artificial neural networks train by shuffling gigabytes of independent, identically distributed (i.i.d.) batches. A biological agent encounters experience sequentially. Learning continuously during wakefulness causes two thermodynamic crises:

Synaptic Saturation

82%

Signal-to-Noise Ratio

Degraded (-6 dB)

Memory Consolidation

Pending Replay

g(sleep)ij=g(wake)ij×(1 − α), where α ≈ 0.18

Synaptic Homeostasis Hypothesis (Tononi & Cirelli): Multiplicative downscaling compresses total synaptic volume and metabolic dissipation by ~20% while mathematically preserving relative synaptic ratios g_ij / g_ik (retaining memories while restoring dynamic sensitivity).

Memory Partitioning

Dual-Speed Memory Consolidation

Lifelong learning without catastrophic forgetting requires two physically distinct memory speeds:

Fast High-Plasticity Buffer (Hippocampal Analog): Rapidly captures sequential, high-surprise sensory episodes during daytime active inference without destabilizing global networks.
Slow Deep Substrate (Neocortical Analog): Crystallized, non-volatile memristive network encoding foundational topological world models and invariant causal invariants.
Surprise-Gated Consolidation: During quiescent sleep, high-surprise trajectories (∫ ℱ dt) are autonomously replayed from the fast buffer into the slow substrate.

Thermodynamic Regulation

The Two Crises of Lifelong Plasticity

Continuous online learning without sleep causes runaway thermodynamic instability:

Synaptic Saturation Crisis: Hebbian learning exhibits net potentiation (Σ Δg > 0). Without homeostatic reset, conductances saturate (g → g_max), dynamic range collapses, and signal-to-noise ratio drops by up to 12 dB.
Thermal Dissipation Surge: In analog crossbars, power dissipation scales with total conductance (P = Σ V²g). Saturated conductances cause runaway joule heating.
The Sleep Solution: Decouples external sensors (u(t) → 0), prunes low-signal noise connections, and resets conductances to linear operating points.

During wakefulness, net synaptic potentiation drives conductances toward physical saturation, depleting dynamic range. Sleep decouples sensory input, replays high-surprise episodes, and globally downscales conductances back to baseline operating points without memory loss.

5. Embodied Active Inference vs. Disembodied Autoregression

Current frontier AI relies on autoregressive next-token prediction across static text tokens. Living intelligence is grounded in continuous, embodied sensorimotor interaction governed by non-equilibrium thermodynamics:

F(q, y)=DKL[q(θ)∥p(θ)]−𝔼q[lnp(y∣ θ)]≥ −lnp(y)

The Free Energy Principle (Friston): Variational Free Energy ℱ partitions sensory error into a Model Complexity Penalty (D_KL) and Perceptual Accuracy (E_q[ln p(y|θ)]), providing a computable upper bound on sensory surprise −ln p(y). An active inference agent acts upon its environment to fulfill its internal homeostatic predictions.

Disembodied Transformers

The Limits of Autoregression

Next-token prediction optimizes statistical correlation across ungrounded symbolic corpora:

Zero Physical Grounding: A language model has never felt inertia, gravity, resistance, or thermodynamics; it manipulates word distributions without causal understanding.
Open-Loop Hallucination: Lacks an active motor loop to test hypotheses against physical reality, causing catastrophic errors when interpolating outside training data.
Infrastructural Fragility: Demands 100-megawatt to gigawatt utility interconnects and liquid-cooled datacenter campuses to sustain inference.

Biomorphic Active Inference

The Power of Grounded Action

ThermoCog anchors cognition in continuous-time sensorimotor loops:

Closed-Loop Sensorimotor Grounding: Motor actions alter sensory incoming flows, directly validating or refuting internal state estimations in real time.
The Moravec Foundation: Evolution dedicated 500 million years to perfecting balance, tactile feedback, and spatial kinematics; symbolic reasoning is an evolutionary adaptation resting on this foundation.
Continuous Homeostasis: Maintains physical survival boundaries inside a 20-Watt metabolic envelope using analog dynamical ODE relaxation.

6. Architectural Specification Matrix

A comprehensive systems engineering comparison between conventional deep learning infrastructure and the ThermoCog biomorphic architecture:

System Dimension	ThermoCog Biomorphic Architecture	Conventional Deep Learning (GPU/LLM)
Primary Physical Substrate	Analog memristive crossbar & continuous ODEs	Synchronous digital CMOS (ALUs, FPUs, Tensor Cores)
Sustained Power Envelope	< 20 Watts (Full System Target)	700W – 1,200W per accelerator (Megawatts / Cluster)
Energy per Synaptic Operation	~10 – 150 fJ (ASIC Target) • 350 μW active MCU baseline	~1 – 10 nanojoules (10⁻⁹ – 10⁻⁸ J)
Memory-Compute Topology	Zero-distance co-located in-situ conductances	Von Neumann separated (HBM3e ↔ PCIe ↔ SRAM cache)
Temporal Dynamics	Continuous-time ODEs (Liquid Time-Constants)	Discrete sequential token steps (clock cycles)
Credit Assignment Mechanism	Kirchhoff's current law & Holomorphic EqProp	Reverse-mode automatic differentiation (Backprop)
Continuous Lifelong Plasticity	Native online adaptation + Quiescent sleep replay	Frozen deployment weights (Fine-tuning causes forgetting)
Fault Tolerance & Degradation	Autonomous Neural Cellular Automata self-repair	Catastrophic single-bit memory parity / ECC fail
Biological Timescale Separation	Tripartite loops (Phylogeny, Ontogeny, Cognition)	Single optimization loop (Overwrites foundational rules)
Sensory & Causal Grounding	Closed-loop embodied active inference (VFE minimization)	Open-loop statistical next-token prediction

7. Hardware Realization Roadmap

The transition from high-level physics to monolithic silicon proceeds across four verified validation milestones:

Phase 1 • Validated

Continuous ODE Dynamical Modeling

Mathematical and dynamical validation of Liquid Time-Constant (LTC) continuous equations, Variational Free Energy minimization, and Holomorphic Equilibrium Propagation convergence under simulated analog noise.

Phase 2 • Active Prototype

Embedded Fixed-Point (Q16.16) Microcontroller

Deterministic integer execution eliminating floating-point unit dissipation. Real-time active inference running on ultra-low-power microcontrollers under 250 milliwatts without external memory shuttling.

Phase 3 • In Development

Hybrid FPGA Neuromorphic Emulation

Massively parallel event-driven hardware emulation of tripartite timescales, evaluating autonomous Neural Cellular Automata self-repair grids and real-time wake/sleep homeostatic downscaling under hardware fault injection.

Phase 4 • Target Envelope

Monolithic In-Memory Analog Crossbars

Custom semiconductor integration co-locating non-volatile memristive conductances with passive Kirchhoff relaxation networks. Direct physical implementation of the sub-20-Watt biomorphic intelligence envelope.

8. Audio Briefing & Architectural Discussion

Listen to the technical discussion on thermodynamic cognition, the physical limits of digital scaling, and why biological intelligence must sleep:

Featured Architectural Briefing • 5:30 Audio Discussion

Why 20-Watt Biomorphic AGI Must Sleep

An in-depth first-principles exploration of the Von Neumann bottleneck, why brute-force datacenter scaling is hitting a thermodynamic wall, in-memory physical computation with analog memristive crossbars, Neural Cellular Automata (NCA) self-repair, Holomorphic Equilibrium Propagation, and why lifelong physical intelligence requires a homeostatic sleep state for memory consolidation.

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[Host 1]

You know, when you think about frontier artificial intelligence today, you, you probably picture massive warehouses just full of glowing servers, humming away, pulling down enough electricity to power a small city. Yeah. Exactly.

[Host 2]

I mean, we basically treat intelligence like an industrial mining operation right now. We just throw more power, more data,

[Host 1]

well, more brute force at the problem. But today's deep dive flips that entirely on its head. We're unpacking a really dense, honestly mind-bending whitepaper on biomorphic AGI. Right. And the core mission here is to understand why this brute force approach of massive datacenters is

[Host 2]

hitting a physical wall. And why the ultimate solution is a biological blueprint for AI that runs on just 20-Watts of power.

[Host 1]

Okay. Let's unpack this. Why can't we just keep building bigger digital datacenters? Like, what is physically stopping us?

[Host 2]

Well, it comes down to a structural flaw called the Von Neumann bottleneck. So in modern digital hardware, your memory storage and your computational processors are—they're physically separated. And moving the data between those two places actually takes, like, a hundred to a thousand times more energy than doing the actual math. So you hit a thermal and economic ceiling just, you know,

[Host 1]

shuttling data around. Oh, wow. So it's—I mean, it's like commuting a 100 miles to a kitchen every single time you need to chop a single piece of carrot for a soup. You're spending all your energy on the commute, not the actual cooking.

[Host 2]

That's spot on. And what's fascinating here is that biological brains bypass this entirely. They actually compute in memory.

[Host 1]

Wait, in memory?

[Host 2]

Yeah, so your synapses are simultaneously the hard drive and the processor.

[Host 1]

Computing happens physically via chemistry right where the data lives. Which makes a biological brain like billions of times more energy efficient than our best silicon chips. So the old digital model is doomed by that commute, basically. And that's why this paper suggests we need to borrow three loops from biology. Right? Phylogeny, which is evolution, cognition, or active inference, and

[Host 2]

ontogeny.

[Host 1]

Right. Ontogeny, which is self-repair. Yeah. And here's where it gets really interesting, because I have to push back here. Are we talking about actual physical wires regrowing in a machine?

[Host 2]

Or is this, you know, just happening in software? No. It's physical hardware behaving like biology. It uses this mathematical framework called Neural Cellular Automata. The hardware isn't a rigid static grid at all. If the network gets physically damaged, the local cells actually feel this sudden drop in spatial gradients. They literally sense the void where their neighbors used to be. Oh, wow. Right. Triggered by that physical disruption, they autonomously regrow their connections along new chemical gradients to restore function.

[Host 1]

And this is entirely without human intervention. Let me stop you there. How is a machine physically regrowing its own pathways? Like, what is this even made of?

[Host 2]

So the system uses analog memristive crossbars. Computing instantly via Ohm's law. And the paper also mentioned something wild called Holomorphic Equilibrium Propagation.

[Host 1]

Can we get a plain-English breakdown of what a memristive crossbar actually is?

[Host 2]

Yeah. Absolutely. Think of it as a grid of wires that can remember how much electricity has flowed through them, and then they change their own electrical resistance accordingly.

[Host 1]

So instead of shuttling ones and zeros around, it just lets current flow?

[Host 2]

Exactly. The computation happens instantly based on basic physics and that Holomorphic Equilibrium Propagation.

[Host 1]

That's just a fancy way of saying the system learns by finding the path of least resistance.

[Host 1]

Oh, so it actively uses its own physical hardware flaws to its advantage?

[Host 2]

Yeah. Like the natural wire resistance, it uses that to calculate the right answer.

[Host 1]

That is brilliant. It uses imperfections to learn. But wait, if this hardware is constantly finding new paths and rewriting its own resistance to save energy, wouldn't it just overwrite everything it learned yesterday?

[Host 2]

Yes, which is the famous catastrophic forgetting problem.

[Host 1]

Right. So what does this all mean for how it actually remembers things?

[Host 2]

Well, to solve it, the system uses dual-speed memory. So it has a fast memory for new experiences and a slow memory for core knowledge. But to manage the transfer between the two, this 20-Watt device literally needs to sleep.

[Host 1]

Wait, what? How does a physical piece of hardware sleep?

[Host 2]

It enters a state of homeostatic idling. It drops its power usage, shuts out new external data, and rapidly replays the electrical patterns of its daily episodic memories.

[Host 1]

Doing this offline.

[Host 2]

Exactly. It gently merges those new experiences into its core structure at a fraction of the learning rate. So it adapts its physical shape without breaking its foundational knowledge.

[Host 1]

That is just wild. And the relevance here to you, the listener, is huge.

[Host 2]

We are looking at a future where AI isn't dependent on giant megawatt server farms at all. No. We're talking about untethered 20-Watt devices learning dynamically in real time right on the edge.

[Host 1]

Right in your pocket, basically.

[Host 2]

Yeah. And when you connect this to the bigger picture, it challenges our entire assumption that intelligence is just abstract software.

[Host 1]

It shows intelligence is fundamentally a physical process. Meaning it's about a physical body adapting its shape to minimize energy, which, you know, brings us back to that massive server farm humming with electricity. If genuine general intelligence strictly requires biological constraints like physical embodiment and actually needing a sleep state to consolidate its memories, does that mean the first true AGI will inherently know what it feels like to be exhausted?

9. Frequently Asked Questions

First-principles answers to common inquiries regarding Thermodynamic Cognition, physical energy minimization, and biomorphic architectures. Proprietary circuit topologies, mixed-signal layouts, and algorithmic firmware routines are subject to confidential patent protections and accessible exclusively under mutual NDA:

What does the name “ThermoCog” mean, and what is its core thesis?

ThermoCog is a shorthand for “Thermodynamic Cognition.” This highlights the foundational thesis of the blueprint: that true general intelligence is a physical, energy-minimizing relaxation process rather than an abstract software scaling problem. Rather than forcing arithmetic through digital logic gates, ThermoCog lets physical dynamical systems relax toward equilibrium down energy landscapes on a 20-Watt metabolic envelope.

Why is industrial digital scaling (GPUs and TPUs) hitting a thermodynamic wall?

Digital accelerators are bound by the Von Neumann bottleneck: memory cells are physically separated from arithmetic logic units. Moving tensors back and forth across high-bandwidth memory (HBM), buses, and optical interconnects consumes between 90% and 99% of total system energy before arithmetic even begins.

Under Landauer's principle, the erasure of physical information in discrete Boolean logic requires a minimum dissipation of E_min = k_B T ln 2 ≈ 2.97 × 10⁻²¹ J per bit at body temperature. Digital GPUs operate at roughly 10⁻¹¹ J per operation (billions of times above fundamental physics) due to clock distribution, parasitic capacitance, and data transport. Living cortical tissue computes in-situ at ~10⁻¹⁴ J, approaching thermodynamic reversibility.

How does continuous physical relaxation compute gradients without backpropagation?

ThermoCog replaces backpropagation with Equilibrium Propagation (EqProp) and Holomorphic Equilibrium Propagation (hEP). Rather than freezing forward activations in memory and running an energy-expensive global backward pass with transposed weight matrices, EqProp lets physics do the math in two phases:

Free Relaxation Phase: Inputs are applied, and the analog circuit naturally settles into a minimum energy state (steady-state equilibrium).
Nudged Phase: A small teaching perturbation is applied at the output terminals, nudging node potentials toward the target state.

The local difference in node activities between these two phases directly yields exact parameter gradients: Δw_ij ∝ s_i^+ s_j^+ - s_i^0 s_j^0. In Holomorphic EqProp, complex-frequency perturbations absorb hardware imperfections (such as wire resistance and sneak paths) directly into the energy minimization pass.

Doesn't peripheral circuitry—specifically ADC/DAC conversion and bus drivers—eliminate the energy advantages of analog crossbars?

In naive hybrid accelerators, yes: converting digital values to analog voltages and digitizing column currents after every single matrix multiplication creates an “ADC/DAC wall” that consumes over 80% of total chip energy and silicon area.

ThermoCog's architecture mitigates this by avoiding per-layer digitization. By coupling analog crossbars directly to continuous-time Liquid Time-Constant (LTC) neural ODE dynamics, activation states propagate physically as continuous electrical signals across computational stages. Analog-to-digital conversions are restricted strictly to sensory transduction boundaries and the episodic memory consolidation interface, rather than occurring at every layer. Specific mixed-signal interface topologies and low-power readout schemes are maintained under confidential patent disclosures.

Analog memristors suffer from cycle-to-cycle drift, sneak paths, and device variability. How can physical systems maintain stability without high-precision digital bits?

Traditional digital AI requires 100% bit-exact determinism because digital rounding errors cascade chaotically. In contrast, biological brains compute with notoriously noisy, stochastic, and imprecise biological synapses.

ThermoCog approaches analog device non-ideality through architectural fault-tolerance rather than brute-force precision. At the Cognition layer, continuous dynamical attractors absorb low-level analog noise. At the Ontogeny layer, Neural Cellular Automata (NCA) update rules dynamically reconfigure conductance gradients around degraded or non-functional memristive cells, autonomously redistributing signal pathways without external supervisor intervention. Crucially, the mandatory homeostatic sleep cycle periodically renormalizes synaptic conductances, preventing drift toward saturation rails. Specific dynamic defect-rerouting topologies and adaptive calibration protocols are maintained under confidential patent disclosures.

How do Neural Cellular Automata (NCAs) solve analog hardware defects and yield?

Analog memristive crossbars (such as ReRAM or PCRAM) suffer from high device-to-device variability, conductance drift, and fabrication line defects. Attempting to flash trillions of rigid digital weights into imprecise analog cells leads to yield failure.

ThermoCog borrows nature's solution: indirect developmental encoding. Just as 1 Gigabyte of genomic data generates and wires 86 billion neurons and 150 trillion synapses, ThermoCog uses Neural Cellular Automata (NCAs) as an ontogenetic morphogenetic field. Instead of storing explicit weights, a compact developmental rule grows functional network topologies. When physical crosspoints fail or degrade, local signaling gradients automatically trigger zero-shot functional self-repair—dynamically rerouting signal paths and adapting neighbor conductances to restore target network dynamics without physical human intervention or factory recalibration.

Why is biological sleep a physical and thermodynamic requirement?

Under the Synaptic Homeostasis Hypothesis (SHY) established by Tononi and Cirelli, continuous wakeful learning causes synaptic conductances to progressively potentiate. Without a restorative phase, this produces two existential crises:

Synaptic Saturation: Weights reach physical conduction limits, destroying plasticity and dynamic range.
Thermal Dissipation Surge: Increased conductance draws excessive current, causing runaway heat dissipation.

Offline slow-wave sleep performs homeostatic multiplicative downscaling (a net ~18% reduction across conductances), restoring the signal-to-noise ratio, resetting baseline thermodynamic free energy, and consolidating fast hippocampus-like trajectories into stable cortical topological invariants.

Does ThermoCog eliminate Large Language Models, or how do they fit together?

ThermoCog does not eliminate LLMs; it contextualizes them within a tripartite multi-timescale hierarchy:

Loop 1 • Phylogeny (Evolutionary Grammar): Large language models and foundation models operate here on long timescales (hours to generations), generating, validating, and mutating developmental recipes and topological priors.
Loop 2 • Ontogeny (Morphogenetic Field): Neural Cellular Automata coordinate physical cell division, growth, and autonomous self-repair across intermediate timescales (seconds to minutes).
Loop 3 • Cognition (Continuous Active Inference): In-memory analog crossbars and Liquid Time-Constant (LTC) networks execute millisecond-level sensory perception and motor actuation.

High-frequency embodied control is offloaded to physical analog relaxation, freeing LLMs to perform high-level symbolic governance rather than burning gigawatts predicting continuous physics.

How does ThermoCog compare in power consumption to modern datacenter AI?

The human brain demonstrates that open-ended general intelligence, lifelong learning, and motor actuation can be achieved within an estimated 20-Watt metabolic envelope, dissipating between ~0.1 to 10 fJ per synaptic event.

By contrast, datacenter GPU clusters training and serving frontier models consume between hundreds of kilowatts to gigawatts, spending ~10 to 50 nJ per operation due to memory bus shuttling and clock distribution. ThermoCog targets this >20,000× efficiency gap by co-locating memory with physical relaxation in continuous analog crossbars.

Has ThermoCog been validated in hardware, or is it purely theoretical?

ThermoCog's continuous active inference cognitive cycle has been benchmarked on physical silicon using deterministic Q16.16 fixed-point arithmetic in pure C99 without a hardware floating-point unit (FPU), representing Phase 2 of our architectural roadmap.

On an embedded 64 MHz ARM Cortex-M4 microcontroller, the continuous state estimation, perception update, and action inference cycle executes in ~1.8 microseconds, consuming just 350 microwatts of dynamic power and requiring only 48 bytes of static RAM. This translates to an energy dissipation of E ≈ 630 pJ per cognitive contraction step, or ~1.2 pJ per effective synaptic operation across the active recurrent state matrix—already >8,000× more efficient than datacenter GPU clusters. The Cortex-M4 serves as an algorithmic and numerical testbed proving that continuous non-linear dynamical systems converge deterministically in ultra-constrained integer registers; monolithic analog memristive integration (targeting 10–50 fJ/SOP) represents Phase 4.

How does ThermoCog handle sneak-path leakage, line-resistance drops, and memristive conductance asymmetry in physical crossbars?

These classical physical challenges are addressed at distinct layers of the ThermoCog architecture:

Sneak Paths & Line Drop (IR Drop): Unbounded passive crossbars are unviable at scale. The physical hardware design utilizes modular tiled sub-arrays (typically 64×64 to 128×128 cells) equipped with 1T1R (one-transistor-one-resistor) or 1S1R (one-selector-one-resistor) access devices. Tiling bounds parasitic wire resistance losses within a deterministic <2.5% error margin, while selectors suppress half-select sneak-path currents below the thermal floor.
Device Conductance Asymmetry: Memristive materials exhibit asymmetric potentiation versus depression kinetics, which destabilizes naive symmetric Equilibrium Propagation. ThermoCog resolves this through Holomorphic Equilibrium Propagation (hEP) and vector-field asymmetric feedback alignment, where the energy state is formulated over complex-valued coordinates. The resulting gradient flow satisfies Cauchy-Riemann conditions, decoupling phase relaxation from non-linear device gain scaling.
Topological Defect Tolerance (NCA): Neural Cellular Automata do not replace circuit-level selectors; instead, they operate as an ontogenetic morphogenetic layer (Loop 2). When individual physical devices suffer permanent breakdown or drift, local NCA state updates autonomously reroute signal trajectories around degraded nodes without external digital supervisor mapping.
Drift Saturation (Homeostatic Sleep): The mandatory slow-wave sleep phase (Loop 3) performs periodic multiplicative conductance downscaling (~18%), resetting baseline zero-drifts and preventing physical devices from drifting toward saturation rails.

Is ThermoCog attempting to displace digital datacenter GPU clusters, and what is the commercial strategy?

ThermoCog is not a capital-expenditure semiconductor foundry initiative seeking to replace multi-megawatt hyperscaler clusters for autoregressive text generation. Fighting the trillion-dollar inertia of digital CMOS and CUDA for centralized cloud batch workloads would be commercially counterproductive.

Instead, ThermoCog pursues a dual-horizon commercialization strategy:

Sovereign Edge & Embodied Autonomy (Near Term): High-demand specialized applications where datacenter connectivity is impossible and strict 20-Watt or milliwatt power budgets are non-negotiable—including autonomous aerospace navigation, defense robotics, distributed environmental monitoring, and biomedical neural interfaces.
Architectural IP & Semiconductor Licensing (Long Term): Protecting and licensing proprietary biomorphic topologies, Holomorphic Equilibrium Propagation algorithms, and Neural Cellular Automata self-repair engines to established semiconductor fabricators and edge silicon designers through patent disclosures.

Who is building ThermoCog, and what qualifies a software architect to work on neuromorphic hardware?

ThermoCog is the work of Cisco Caceres, and the answer has two halves, because half of the objection is correct.

What he is not: a device physicist or a semiconductor process engineer. Nobody here is going to fabricate a memristive crossbar, and nothing on this page says otherwise. That is exactly why Phase 4 is a licensing target rather than a build plan. The architecture goes to fabricators who already own the process.

What the road to Phase 4 actually demands is systems engineering held to a power budget, which is a forty-five year record:

Below the abstraction line: firmware, circuit design, and boards carried from schematic through fabrication into products that shipped. First program entered on a MITS Altair 8800 by front-panel switches in the late 1970s; an Intel 8080 emulator later written from scratch that passes the period conformance diagnostics, including 8080EXM.
Real-time signal work under noise: roughly twelve years in speech recognition, including federal deployments where recognition had to hold on degraded two-way radio audio in adversarial acoustic conditions. Continuous signals, hard latency budgets, and no second attempt.
Patents: named inventor on an issued US patent, with filings dating to 2002. Relevant here because the commercial strategy above is an IP strategy before it is a manufacturing one.

And the claim is checkable rather than asserted. Phase 2 is not a slide. The continuous active inference cycle is benchmarked on physical silicon: a 64 MHz ARM Cortex-M4, pure C99, deterministic Q16.16 fixed-point arithmetic, no floating-point unit, ~1.8 microseconds per cycle at 350 microwatts, in 48 bytes of static RAM. Eliminating floating-point dissipation is an embedded engineering problem before it is a neuroscience one. The thermodynamic claims on this site ship with a test suite that checks them against Landauer’s limit and measured biological energetics rather than restating them.

The parts being claimed are the parts already done before. The part that needs a foundry is the part being licensed to one.

10. Foundational Lexicon & Glossary

First-principles definitions, physical bounds, and mathematical formalisms underpinning Thermodynamic Cognition and biomorphic hardware:

ThermoCog Core Thesis: Shorthand for “Thermodynamic Cognition.” The underlying architectural thesis that intelligence is fundamentally a physical, non-equilibrium energy-minimizing relaxation process rather than an abstract digital software scaling problem.
Landauer Floor Physics Bound: The thermodynamic lower bound on irreversible computation established by Rolf Landauer (1961): erasing one bit of physical information at temperature T dissipates at least E_min = k_BT ln 2 ≈ 2.87 × 10⁻²¹ J (~0.018 eV at 300K). Digital GPUs dissipate over 10⁷× this limit moving bits across bus lines.
Equilibrium Propagation Energy-Based Learning: A biomorphic learning algorithm (Scellier & Bengio, 2017) for continuous-time physical systems. Rather than computing gradients via non-physical backward graph transport (backpropagation), EqProp converges to a free energy minimum in a relaxed phase, nudges output nodes in a second phase, and computes exact gradient updates from local physical state differences (Δw ∝ s_i⁺ s_j⁺ − s_i⁻ s_j⁻).
Liquid Time-Constants (LTC) Neural Dynamics: Continuous-depth neural ODE architectures (Hasani et al., 2021) whose effective membrane time constants adapt continuously as a function of incoming input conductance: τ_eff(x) = τ_base / (1 + w · σ(x)). High input rates contract response latency for reactive control; quiescent periods dilate the time constant to conserve energy.
Neural Cellular Automata (NCA) Morphogenetic Ontogeny: Decentralized self-organizing networks (Mordvintsev et al., 2020) where computational units update state strictly via local neighbor communication. NCA governs developmental Ontogeny, enabling analog hardware substrates to grow functional topologies, regenerate severed connections, and heal physical drift without centralized control.
Synaptic Homeostasis (SHY) Biological Sleep: The neurobiological framework (Tononi & Cirelli, 2003) establishing that waking cognition causes net synaptic potentiation that saturates metabolic capacity. Homeostatic sleep enacts offline global synaptic downscaling (~18% net renormalization), restoring signal-to-noise ratio and preventing runaway saturation within a 20-Watt metabolic ceiling.
Active Inference Free Energy Principle: Friston's neurocomputational framework stating that embodied cognitive agents maintain homeostasis by minimizing Variational Free Energy (F), which upper-bounds perceptual surprise. Perception optimizes internal states to explain sensory inputs; action manipulates the environment to realize prior expectations.
Memristive Crossbar Array Analog Compute: An in-memory grid of non-volatile conductance nodes that performs Matrix-Vector Multiplication (VMM) in Ο(1) continuous time. Voltage inputs apply across rows, Ohm's law calculates product currents (I = V · G), and Kirchhoff's current law passively sums currents along columns, eliminating digital memory shuttling entirely.
Von Neumann Bottleneck Silicon Architecture: The physical separation between computational logic (ALUs) and memory storage (DRAM/HBM) connected by a bus. In modern deep learning accelerators, over 90% of total electrical power is dissipated charging and discharging the capacitance of these interconnect wires rather than performing calculations.
Dual-Speed Memory System Consolidation: Complementary Learning Systems architecture pairing a rapid, volatile episodic buffer (analogous to the biological hippocampus) with a slow, structural memory array (analogous to the neocortex). During offline sleep replay, episodic traces are distilled into slow conductances without catastrophic forgetting.

Research Collaborations & Institutional Access

ThermoCog investigates biomorphic intelligence operating within biological thermodynamic power envelopes. Detailed architectural designs, continuous-time simulation frameworks, and provisional patent disclosures are accessible to academic institutions, semiconductor laboratories, and hardware partners under mutual confidentiality.

Inquire about institutional research access →

11. Academic Foundations & Literature Archive

The ThermoCog biomorphic architecture unifies empirical results, mathematical formalisms, and hardware designs across non-equilibrium thermodynamics, neuromorphic engineering, and active inference. Explore the primary literature informing each architectural layer:

1. Thermodynamic Limits & Physical Information

Irreversibility and Heat Generation in the Computing ProcessIBM JRD • 1961

Landauer, R. — IBM Journal of Research and Development, 5(3), 183–191
doi:10.1147/rd.53.0183 ↗
Power Consumption During Neuronal ComputationIEEE • 2014

Sengupta, B., & Stemmler, M. B. — Proceedings of the IEEE, 102(5), 738–750
doi:10.1109/JPROC.2014.2307755 ↗
Thermodynamic Bound on Energy and Negentropy Costs of Inference in Deep Neural NetworksarXiv • 2025

Tkachenko, A. V. — Brookhaven National Laboratory / arXiv preprint arXiv:2503.09980
arxiv.org/abs/2503.09980 ↗
The Landauer Principle and Its Implementations in Physics, Chemistry, and BiologyMDPI Book • 2020

Bormashenko, E. (Ed.) — Current Status, Critics and Controversies, ISBN 978-3-03928-868-7
doi:10.3390/books978-3-03928-868-7 ↗

2. Equilibrium Propagation & Physical Energy Minimization

Equilibrium Propagation: Bridging the Gap between Energy-Based Models and BackpropagationFrontiers • 2017

Scellier, B., & Bengio, Y. — Frontiers in Computational Neuroscience, 11, 24
doi:10.3389/fncom.2017.00024 ↗
Holomorphic Equilibrium Propagation Computes Exact Gradients Through Finite Size OscillationsNeurIPS • 2022

Laborieux, A., & Zenke, F. — Advances in Neural Information Processing Systems, 35, 12950–12961
arxiv.org/abs/2209.00530 ↗
Training End-to-End Analog Neural Networks with Equilibrium PropagationarXiv • 2020

Kendall, J., Pantone, R., Manickavasagam, K., Bengio, Y., & Scellier, B. — arXiv preprint arXiv:2006.01981
arxiv.org/abs/2006.01981 ↗
Frequency Propagation: Multimechanism Learning in Nonlinear Physical NetworksMIT Press • 2024

Anisetti, V. R., Kandala, A., Scellier, B., & Schwarz, J. M. — Neural Computation, 36(4), 596–624
doi:10.1162/neco_a_01654 ↗
Activity-Difference Training of Memristor Crossbar Neural Networks via Equilibrium PropagationNature Electronics • 2023

Yi, Z., et al. — Nature Electronics, 6(11), 893–902
doi:10.1038/s41928-023-01031-1 ↗

3. Morphogenesis, Basal Cognition & Neural Cellular Automata

Growing Neural Cellular AutomataDistill • 2020

Mordvintsev, A., Randazzo, E., Niklasson, E., & Levin, M. — Distill, 5(2), e23
distill.pub/2020/growing-ca ↗
Neural Cellular Automata: From Cells to PixelsACM SIGGRAPH • 2024

Pajouheshgar, E., Xu, Y., Abbasi, A., Mordvintsev, A., Jakob, W., & Süsstrunk, S. — ACM Transactions on Graphics (SIGGRAPH 2024)
arxiv.org/abs/2406.02476 ↗
A Path to Universal Neural Cellular AutomataALIFE • 2024

Béna, G., Faldor, M., Goodman, D. F. M., & Cully, A. — Artificial Life Conference Proceedings, 36, 102
arxiv.org/abs/2409.08871 ↗
The Computational Boundary of a “Self”: Developmental Bioelectricity Drive to Anatomical HomeostasisFrontiers • 2019

Levin, M. — Frontiers in Psychology, 10, 2688
doi:10.3389/fpsyg.2019.02688 ↗
Regenerating Soft Robots through Neural Cellular AutomataarXiv • 2021

Randazzo, E., Mordvintsev, A., Niklasson, E., Levin, M., & Greydanus, S. — arXiv preprint arXiv:2102.02579
arxiv.org/abs/2102.02579 ↗
Compositional Pattern Producing Networks: A Novel Abstraction of DevelopmentSpringer • 2007

Stanley, K. O. — Genetic Programming and Evolvable Machines, 8(2), 131–162
doi:10.1007/s10710-007-9028-8 ↗
A Hypercube-Based Encoding for Evolving Large-Scale Neural Networks (HyperNEAT)MIT Press • 2009

Stanley, K. O., D'Ambrosio, D. B., & Gauci, J. — Artificial Life, 15(2), 185–212
doi:10.1162/artl.2009.15.2.15202 ↗

4. Continuous Active Inference & Synaptic Homeostasis

The Free-Energy Principle: A Unified Brain Theory?Nature • 2010

Friston, K. — Nature Reviews Neuroscience, 11(2), 127–138
doi:10.1038/nrn2787 ↗
Sleep and the Price of Plasticity: From Synaptic and Cellular Homeostasis to Memory ConsolidationNeuron • 2014

Tononi, G., & Cirelli, C. — Neuron, 81(1), 12–34
doi:10.1016/j.neuron.2013.12.025 ↗
Ultrastructural Evidence for Synaptic Scaling Across the Wake/Sleep CycleScience • 2017

de Vivo, L., Bellesi, M., Marshall, W., Bushong, E. A., Ellisman, M. H., Tononi, G., & Cirelli, C. — Science, 355(6324), 507–510
doi:10.1126/science.aah5982 ↗
Liquid Time-Constant NetworksAAAI • 2021

Hasani, R., Lechner, M., Amini, A., Rus, D., & Grosu, R. — AAAI Conference on Artificial Intelligence, 35(9), 7657–7666
arxiv.org/abs/2006.04439 ↗
Inferring Neural Activity Before Plasticity as a Foundation for Learning Beyond BackpropagationNature Neuroscience • 2024

Song, Y., Millidge, B., Salvatori, T., et al. — Nature Neuroscience, 27, 348–358
doi:10.1038/s41593-023-01514-1 ↗

5. Memristive In-Memory Substrates & Circuit Non-Idealities

Neuromorphic Electronic SystemsIEEE • 1990

Mead, C. — Proceedings of the IEEE, 78(10), 1629–1636
doi:10.1109/5.58356 ↗
The Future of Electronics Based on Memristive SystemsNature Electronics • 2018

Zidan, M. A., Strachan, J. P., & Lu, W. D. — Nature Electronics, 1(1), 22–29
doi:10.1038/s41928-017-0006-8 ↗
Dealing with Non-Idealities in Memristor Based Computation-In-Memory DesignsIEEE VLSI-SoC • 2022

Gebregiorgis, A., Singh, A., Diware, S., Bishnoi, R., & Hamdioui, S. — 2022 IFIP/IEEE 30th International Conference on Very Large Scale Integration
doi:10.1109/VLSI-SoC54400.2022.9939634 ↗
Sneak-Path Constraints in Memristor Crossbar ArraysIEEE Trans Info Theory • 2016

Cassuto, Y., Kvatinsky, S., & Yaakobi, E. — IEEE Transactions on Information Theory, 62(9), 4801–4813
doi:10.1109/TIT.2016.2574488 ↗
Algorithms for Tackling Limited Labels, Device Imperfections, and Write/Read Consistency in In-Memory Neural NetworksCNRS / Thales • 2025

Liu, D. — Université Paris-Saclay / Laboratoire Albert Fert (CNRS/Thales) Thesis
laboratoire-albert-fert.cnrs-thales.fr/.../these_liu.pdf ↗
Low-Power Neuromorphic Hardware for Embedded Artificial Intelligence ApplicationsIEEE • 2019

Rajendran, B., Sebastian, A., Schmuker, M., et al. — Proceedings of the IEEE, 107(1), 141–161
doi:10.1109/JPROC.2018.2874136 ↗